TWiki> CSLab Web>BibPortal>MultiCoreSystems (revision 3)EditAttach

Multicore Systems

This portal provides links to documentation about various multicore architectures.

A more informative page is the Chip Multiprocessor Watch Wiki maintained by Berkeley.



  • "IBM Power6". IBM Journal of Research and Development, 2007. (IBM link) (pdf)
  • "Power efficient processor architecture and the cell processor". H.P. Hofstee. 11th International Symposium on High-Performance Computer Architecture, 2005. (pdf) (CSLab) (IBM link)
  • "IBM Power5 chip: a dual-core multithreaded processor". R. Kalla, S. Balaram, J.M. Tendler. IEEE Micro, vol 24, no 2, pp. 40-47, Mar-Apr 2004. (pdf) (CSLab) (IBM link)


  • "Larrabee: a many-core x86 architecture for visual computing" . Larry Seiler, Doug Carmean, Eric Sprangle, Tom Forsyth, Michael Abrash, Pradeep Dubey, Stephen Junkins, Adam Lake, Jeremy Sugerman, Robert Cavin, Roger Espasa, Ed Grochowski, Toni Juan, Pat Hanrahan. ACM Transactions on Graphics, 2008. (pdf) (CSLab)


  • OpenSPARC publications
  • "Niagara: a 32-way multithreaded Sparc processor". P. Kongetira, P, K. Aingaran, K. Olukotun. IEEE Micro, vol 25, no 2, pp. 21-29, Mar-Apr 2005. (pdf) (CSLab)
Edit | Attach | Watch | Print version | History: r4 < r3 < r2 < r1 | Backlinks | Raw View | Raw edit | More topic actions...
Topic revision: r3 - 2008-10-07 - KonstantinosNikas

No permission to view TWiki.WebTopBar

This site is powered by the TWiki collaboration platform Powered by Perl

No permission to view TWiki.WebBottomBar