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Multicore Systems

This portal provides links to documentation about various multicore architectures.

A more informative page is the Chip Multiprocessor Watch Wiki maintained by Berkeley.



  • "IBM Power6". IBM Journal of Research and Development, 2007. (IBM link) (pdf)
  • "Power efficient processor architecture and the cell processor". H.P. Hofstee. 11th International Symposium on High-Performance Computer Architecture, 2005. (pdf) (CSLab) (IBM link)
  • "IBM Power5 chip: a dual-core multithreaded processor". R. Kalla, S. Balaram, J.M. Tendler. IEEE Micro, vol 24, no 2, pp. 40-47, Mar-Apr 2004. (pdf) (CSLab) (IBM link)



  • OpenSPARC publications
  • "Niagara: a 32-way multithreaded Sparc processor". P. Kongetira, P, K. Aingaran, K. Olukotun. IEEE Micro, vol 25, no 2, pp. 21-29, Mar-Apr 2005. (pdf) (CSLab)
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Topic revision: r2 - 2008-10-06 - KonstantinosNikas

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