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name="BibPortal" |
This portal provides links to various research papers on simultaneous multithreading. |
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- "Hyper-Threading Technology Architecture and Microarchitecture". D. Marr, F. Binns, D. Hill, G. Hinton, D. Koufaty, J. Miller, M. Upton. Intel Technology Journal, vol.3, issue 1, 2002. (pdf
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- "Initial Observations of the Simultaneous Multithreading Pentium 4 Processor". N. Tuck, D. Tullsen. Proceedings of the 12th International Conference on Parallel Architectures and Compilation Techniques, 2003. (pdf)
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- "IBM Power5 Chip: A Dual-Core Multithreaded Processor". R. Kalla, B. Sinharoy, J. Tendler. IEEE Micro, vol. 24, no. 2, 2004. (pdf)(cslab)
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- "IBM Power5 Chip: A Dual-Core Multithreaded Processor". R. Kalla, B. Sinharoy, J. Tendler. IEEE Micro, vol. 24, no. 2, 2004. (pdf) (CSLab) (IBM link)
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- "Maximizing TLP with loop-parallelization on SMT". D. Puppin, D. Tullsen. 5th Workshop on Multithreaded Execution, Architecture, and Compilation, 2001. (ps)
- "Code and Data Transformations for Improving Shared Cache Performance on SMT Processors". D. Nikolopoulos. ISHPC, pp. 54-69, 2003. (pdf)
- "Runtime support for integrating precomputation and thread-level parallelism on simultaneous multithreaded processors". M. Curtis-Maury, T. Wang, C. Antonopoulos, D. Nikolopoulos. Proceedings of the 7th workshop on Workshop on languages, compilers, and run-time support for scalable systems, 2004. (pdf)
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- "Runtime Empirical Selection of Loop Schedulers on Hyperthreaded SMPs". Y. Zhang, M. Voss. Proceedings of the 19th International Symposium on Parallel and Distributed Processing, 2005. (pdf)(cslab)
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- "Runtime Empirical Selection of Loop Schedulers on Hyperthreaded SMPs". Y. Zhang, M. Voss. Proceedings of the 19th International Symposium on Parallel and Distributed Processing, 2005. (pdf)(CSLab)
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- "Integrating Multiple Forms of Multithreaded Execution on multi-SMT Systems: A Study with Scientific Applications". M. Curtis-Maury, T. Wang, C. Antonopoulos, D. Nikolopoulos. Proceedings of the Second International Conference on the Quantitative Evaluation of Systems, 2005. (pdf)
- "Dynamic tiling for effective use of shared caches on multithreaded processors". D. Nikolopoulos. International Journal of High Performance Computing and Networking, Vol. 2, pp. 22-35, 2006. (pdf)
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- "Database hash-join algorithms on multithreaded computer architectures". P. Garcia, H. Korth. Proceedings of the 3rd conference on Computing frontiers, 2006. (pdf)(cslab)
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- "Database hash-join algorithms on multithreaded computer architectures". P. Garcia, H. Korth. Proceedings of the 3rd conference on Computing frontiers, 2006. (pdf)(CSLab)
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- "Multigrain parallel Delaunay Mesh generation: challenges and opportunities for multithreaded architectures". C. Antonopoulos, X. Ding, A. Chernikov, F. Bagojevic, D. Nikolopoulos, N. Chrisochoides. Proceedings of the 19th annual international conference on Supercomputing, 2005. (pdf)
- "Stream Programming on General-Purpose Processors". J. Gummaraju, M. Rosenblum. Proceedings of the 38th annual IEEE/ACM International Symposium on Microarchitecture, 2005. (pdf)
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