Suggested Topics For Diploma Theses
(Independent Studies)

in

Parallel Computing Systems

Parallelizing Compilers - Parallelizing Tools

This section includes the development of simple parallelizing tools according to known designing techniques. These tools are precompilers -preprocessors and their task is the automatic extraction of parallelism from sequential programs. The sequential programs that are being studied, consist of a huge number of nested loops, which demand great computing power. Illustrative examples are the algorithms of signal and image processing (matrix operations, convolutions, pattern matching etc). Our goal is the implementation and application of systematic methods for parallelization of sequential programs, and their mapping into parallel architectures.

The Laboratory of Digital Systems and Computers has , for many years, developped a remarkable activity in the area of parallel processing , especially in the area of automatic parallelization of sequential algorithms. There have been developed software tools which are processing programs written in high level languages and map them into special purpose parallel architectures (e.g systolic arrays) or general purpose (MIMD machines). In addition to this, new fast algorithms for the automatic extraction of parallelism are developped, and agorithms which map nested loops into parallel architectures, following various optimization criteria.

Proposed Theses

  • Development of a tool for the automatic partioning and optimum mapping of nested loops into MIMD machines

    This tool is a software program which will partion and map nested loops into MIMD machines. The program's acceptable inputs consist of nested loops and by applying specific transformations, it will assign the loops' computational load to the available parallel processors. The program's output will be the partioning of the set of computations into subsets which are as independent as possible concerning the interchange of data among them. Multiple optimization criteria may be applied, and any research activity concerning tis subject is well accepted.

    Requirements: Knowledge of C programming under Unix / Windows and acquaintance with parallel procesing principles.

  • Development of a tool for the simulation of the operation of special Purpose VLSI Processors (systolic Cells) over a parallel machine of distributed memory (MIMD distributed memory, Paragon , Gcel, PVM etc)

    This software tool will accept,as input, the mathematical description of a systolic structure, as the output of other already implemented software tools, and will simulate its operation onto a parallel machine. Special emphasis will be given to the simulation model for the cells of the systolic structure and to the functional parameters such as the synchronization of operations, the calculation of the message casting among different cells (intercommunication time) etc. Alterantively, the input may have the form of an algorithmic description in a high level language. For this purpose, a special parser, developped in DSCLAB, is available, which transforms the algorithmic description into a mathematical one. Requirements: Knowledge of C programming under Unix / windows and acquaintance with parallel procesing principles.

Information:

Professor G. Papakonstantinou
CS Building, tel: 772-2494
e-mail: papakon@cs.ece.ntua.gr

Aris Koziris
B Building, 7721529-32
e-mail: nkoziris@dsclab.ntua.gr

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Last modified: 04.21.1997