Difference: Parallel (3 vs. 4)

Revision 42008-03-06 - GiorgosVerigakis

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Parallel Systems

The main objective of this activity is to combine the advantages of distributed memory architectures (scalability) and the advantages of the shared memory programming paradigm (easy and secure programming). Other relevant activities are the automatic extraction of parallelism and the subsequent mapping of algorithms onto different types of parallel architectures.
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  In addition, we explore several methods such as overlapping of communication and computations, in order to further reduce the total execution time of the transformed code. The targeted communication platforms include SCI, GM message passing over Myrinet interconnect, etc.
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  • G. Goumas, A. Sotiropoulos, N. Koziris " Minimizing Completion Time for Loop Tiling with Computation and Communication Overlapping ", Proceedings of the 2001 International Parallel and Distributed Processing Symposium (IPDPS2001), IEEE Press, San Francisco, California, April 2001 (Best paper award) (pdf)
  • N. Koziris, A. Sotiropoulos, G. Goumas "*A Pipelined Schedule to Minimize Comple-tion Time for Loop Tiling with Computation and Communication Overlapping*", Journal of Parallel and Distributed Computing, Volume 63, Issue 11, November 2003, pp. 1138-1151 (pdf)
  • M. Athanasaki, A. Sotiropoulos, G. Tsoukalas, N. Koziris, P. Tsanakas "*Hyperplane Grouping and Pipelined Schedules: How to Execute Tiled Loops Fast on Clusters of SMPs*", The Journal of Supercomputing, Volume 33, Issue 3, September 2005, pp. 197 - 226 (pdf)
  • A. Sotiropoulos, G. Tsoukalas, N. Koziris "*Efficient Utilization of Memory Mapped NICs onto Clusters using Pipelined Schedules*", Proceedings of the 2nd IEEE/ACM International Symposium on Cluster Computing and the Grid, Berlin, Germany, May 2002 (pdf)
  • A. Sotiropoulos, G. Tsoukalas, N. Koziris "*Enhancing the Performance of Tiled Loop Execution onto Clusters using Memory Mapped Interfaces and Pipelined Schedules*", Proceedings of the 2002 Workshop on Communication Architecture for Clusters (CAC2002) held in conjunction with Int'l Parallel and Distributed Processing Symposium (IPDPS2002), Fort Lauderdale, Florida, April 2002 (pdf)
  • M. Athanasaki, A. Sotiropoulos, G. Tsoukalas, N. Koziris "*Pipelined Scheduling of Tiled Nested Loops onto Clusters of SMPs using Memory Mapped Network Interfaces*", Proceedings of the ACM/IEEE Supercomputing 2002: High Performance Networking and Computing Conference (SC2002), Baltimore, Maryland, November 2002 (pdf)
  • A. Sotiropoulos, G. Tsoukalas, N. Koziris "*A Pipelined Execution of Tiled Nested Loops onto a Cluster of PCs using PCI-SCI NICs*", Proceedings of the 2001 SCI-Europe Conference, Dublin, Ireland, October 2001 (ps)
  • M. Athanasaki, A. Sotiropoulos, G. Tsoukalas, N. Koziris "*A Pipelined Execution of Tiled Nested Loops on SMPs with Computation and Communication Overlapping*", Proceedings of the Workshop on Compile/Runtime Techniques for Parallel Computing, held in conjunction with 2002 International Conference on Parallel Processing (ICPP-2002), Vancouver, Canada, August 2002 (pdf)
  • A. Sotiropoulos, N. Koziris "*A Pipelined Schedule for Loop Tiling to Minimize Overall Completion Time*", Proceedings of the 8th Panhellenic Conference on Informatics, Nicosia, Cyprus, November 2001 (ps)
>
>
  • G. Goumas, A. Sotiropoulos, N. Koziris "Minimizing Completion Time for Loop Tiling with Computation and Communication Overlapping", Proceedings of the 2001 International Parallel and Distributed Processing Symposium (IPDPS2001), IEEE Press, San Francisco, California, April 2001 (Best paper award) (pdf)
  • N. Koziris, A. Sotiropoulos, G. Goumas "A Pipelined Schedule to Minimize Comple-tion Time for Loop Tiling with Computation and Communication Overlapping", Journal of Parallel and Distributed Computing, Volume 63, Issue 11, November 2003, pp. 1138-1151 (pdf)
  • M. Athanasaki, A. Sotiropoulos, G. Tsoukalas, N. Koziris, P. Tsanakas "Hyperplane Grouping and Pipelined Schedules: How to Execute Tiled Loops Fast on Clusters of SMPs", The Journal of Supercomputing, Volume 33, Issue 3, September 2005, pp. 197 - 226 (pdf)
  • A. Sotiropoulos, G. Tsoukalas, N. Koziris "Efficient Utilization of Memory Mapped NICs onto Clusters using Pipelined Schedules", Proceedings of the 2nd IEEE/ACM International Symposium on Cluster Computing and the Grid, Berlin, Germany, May 2002 (pdf)
  • A. Sotiropoulos, G. Tsoukalas, N. Koziris "Enhancing the Performance of Tiled Loop Execution onto Clusters using Memory Mapped Interfaces and Pipelined Schedules", Proceedings of the 2002 Workshop on Communication Architecture for Clusters (CAC2002) held in conjunction with Int'l Parallel and Distributed Processing Symposium (IPDPS2002), Fort Lauderdale, Florida, April 2002 (pdf)
  • M. Athanasaki, A. Sotiropoulos, G. Tsoukalas, N. Koziris "Pipelined Scheduling of Tiled Nested Loops onto Clusters of SMPs using Memory Mapped Network Interfaces", Proceedings of the ACM/IEEE Supercomputing 2002: High Performance Networking and Computing Conference (SC2002), Baltimore, Maryland, November 2002 (pdf)
  • A. Sotiropoulos, G. Tsoukalas, N. Koziris "A Pipelined Execution of Tiled Nested Loops onto a Cluster of PCs using PCI-SCI NICs", Proceedings of the 2001 SCI-Europe Conference, Dublin, Ireland, October 2001 (ps)
  • M. Athanasaki, A. Sotiropoulos, G. Tsoukalas, N. Koziris "A Pipelined Execution of Tiled Nested Loops on SMPs with Computation and Communication Overlapping", Proceedings of the Workshop on Compile/Runtime Techniques for Parallel Computing, held in conjunction with 2002 International Conference on Parallel Processing (ICPP-2002), Vancouver, Canada, August 2002 (pdf)
  • A. Sotiropoulos, N. Koziris "A Pipelined Schedule for Loop Tiling to Minimize Overall Completion Time", Proceedings of the 8th Panhellenic Conference on Informatics, Nicosia, Cyprus, November 2001 (ps)
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